This invention relates generally to a circuit for driving three-state circuitry, which circuit includes delay means for ensuring that the time it takes to enable the high impedance state of the three state circuitry is shorter than the time it takes to disable the high impedance state. More particularly, the invention relates to a circuit for driving three state circuitry including means coupled to the output stage of the enabling circuitry and to a point within the circuit prior to the delay means for increasing the output transition speed when the circuit switches from a disabling mode to an enabling mode, without requiring output current limiting.
Three state circuits are well known and are capable of assuming three stable conditions; i.e. active high, active low, and high impedance. In circuits such as memory address multiplexes employing three state circuits, operation is enhanced if the time it takes the driver circuits to switch from a disabling mode; (i.e. one in which a three state circuit may assume an active high or an active low output) to an enabling mode (i.e. that which places the three state circuit in its high impedance state) is shorter than the transition time from an enabling mode to a disabling mode.
One known driver circuit for accomplishing the above may be represented by first and second paths each containing an inverter with the first path also containing an extra gate delay. Both the inputs and the outputs of the first and second paths are coupled together. As a result of the extra gate delay in the first path, the inverter in the second path will achieve a low output level while the first path will attempt to maintain a high level when the input first switches from a low level to a high level. This is accomplished in the known circuit by turning on a transistor which sinks that output current when the input switches from a low to a high level. To allow this transistor to realize its on state, however, a resistor is placed between the output and a source of supply voltage which limits the current flowing through the transistor. Unfortunately, this resistor also limits the output current which reduces the circuits ability to drive highly capacitive loads.